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Take an incoming Signal above ~1.1V (OpAmp Comparators on the Inputs make very forgiving Clock Inputs)
and shrink it down to 5MS or lengthen it up to 5 Seconds.
That Gate will appear at the Gate Out.
When the Gate is Over a 10MS Trigger will turn on at the Delay Out.
Set the length of the Gate with the Time Potentiometer OR with the CV Input.
The switches allow you to choose between Interrupt OR Dividing Behavior (1 for each channel).
If you have Interrupt selected, when Clock In receives a new Clock Pulse the time will reset, essentially lengthening your Gate Out and Delay Out to the Time you have set + the time that has already elapsed.
So Gate will never go Low and Delay will never go High if you have a Time set longer than the interval between Clock Pulses (Useful if you have staggered, irregular or random Clocks).
When Dividing is selected Clock In will Ignore new Clock Pulses until it has finished the current cycle it's running.
The Delay 1 Out is Normalled via the Jack switch of the Clock 2 Input for all kinds of Timing madness!